Improving Network-on-Chip-based Turbo Decoder Architectures
نویسندگان
چکیده
منابع مشابه
Improving Network-on-Chip-based Turbo Decoder Architectures
In this work novel results concerning Network-onChip-based turbo decoder architectures are presented. Stemming from previous publications, this work concentrates first on improving the throughput by exploiting adaptive-bandwidthreduction techniques. This technique shows in the best case an improvement of more than 60 Mb/s. Moreover, it is known that double-binary turbo decoders require higher a...
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Wireless communication at near-capacity transmission throughputs is facilitated by employing sophisticated Error Correction Codes (ECCs), such as turbo codes. However, real time communication at high transmission throughputs is only possible if the challenge of implementing turbo decoders having equally high processing throughputs can be overcome. This motivates the implementation of turbo deco...
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Turbo codes are among the most powerful and widely adopted error correcting codes in several communication applications. The high throughput requirements of current and future standards impose that parallel decoders composed by multiple interconnected processing elements are used at the receiver side to efficiently decode turbo codes. In this work, on chip interconnects for multiprocessor turbo...
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Absnmt-Tubo deeding oflowdenrily pllityshrek (LDPC) and geme m b e d lowdensity (GLO) coda and the corresponding deeodor amhitoeh m s are mnridrred. A regular (c,r)-LDF'C code of length n is viewed s the interseetion of c intedrrvrd supersods where each smper.de is the dlred sum of n/r indepodent single pa.rity-cheek w b d l s E*dons e GLD coda dmply utilize mom pwellul subsoder. The turbo d d ...
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ژورنال
عنوان ژورنال: Journal of Signal Processing Systems
سال: 2013
ISSN: 1939-8018,1939-8115
DOI: 10.1007/s11265-013-0733-7